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Seeking a skilled ASIC Power Architect to define Multi Power Domain architectures in SoC with a focus on Low-Power states. Responsibilities include power analysis, optimization, defining methodologies, guiding implementation, and collaborating with cross-functional teams to refine Power Architecture.
Lead the architecture and design of NAND development, provide technical leadership, mentorship, and innovation, collaborate with cross-functional teams to develop cutting-edge storage solutions, and drive system level architecture decisions.
Seeking a Physical Design Lead with expertise in full-chip RDL and bump layouts for semiconductor products. Responsibilities include design optimization, team management, collaboration with packaging and manufacturing engineers, and integration with chip package. Ensure robust design solutions and compliance with project specifications.
Seeking a Senior Manager for the Static Timing Analysis (STA) function to lead a team of engineers responsible for timing performance and integrity of semiconductor designs. Requires deep STA expertise, leadership skills, and vision for process improvement. Responsibilities include team management, developing advanced STA methodologies, collaborating with cross-functional teams, automation of timing analysis processes, and project management. Qualifications include a Bachelor's or Master's degree in relevant field and 15 years of STA experience, with at least 3 years in a leadership role.
Expertise in ASIC verification, System Verilog, UVM, and Verilog. Leading a team of engineers, defining verification plans, creating testbenches, and conducting gate level simulations. Knowledge of serial and memory protocols, scripting languages, and continuous process improvement.
Seeking a Physical Design Implementation Lead with expertise in Static Timing Analysis to lead advanced semiconductor design projects and drive successful implementation of integrated circuits. Responsibilities include leading physical design efforts, performing static timing analysis, collaborating with cross-functional teams, and optimizing power, performance, and area.
Seeking a Principal Engineer with strong expertise in ASIC development and DFT to join a dynamic team working on next-generation Flash Controllers. Responsibilities include defining and implementing industry-leading DFT solutions, collaborating with cross-functional teams, and ensuring quality and timelines are met.
Principal Engineer responsible for developing C++/SystemC models for complex ASIC IPs, SOCs, and Flash Memories. Create system level tests, verify models, and provide timely support for software bring-up. Requires 8-12 years of experience and proficiency in SystemC, TLM, C++, and embedded system test development.
Seeking a Senior Technologist for ASIC Development Engineering with 10-20 years of experience in SOC design and implementation flow. Responsibilities include defining requirements, reviewing product and FW requirements, evaluating implementation solutions, supporting ASIC organization teams, and finding opportunities for design improvement. Qualifications include a Bachelor/Master degree in Electronics/VLSI/Micro-Electronics Engineering, 10+ years of ASIC Design/Architecture experience, RTL design experience, and knowledge in various aspects of SOC design and verification.
Seeking a highly skilled Analog/IO Layout Engineer with 5-10 years of experience to design and implement complex analog and mixed-signal IC layouts. Strong background in analog/IO design principles, hands-on experience with layout tools, and a passion for solving challenging technical problems.
Seeking a skilled and proactive DevOps Observability and Automation Lead to enhance DevOps automation framework, applications' observability, and reliability. Responsible for designing and implementing observability strategies, automating infrastructure deployment, and collaborating with engineering teams. Must have strong analytical, problem-solving, and documentation skills.
Perform application/systems development tasks including defining system needs, coding, designing, implementing, testing, and adapting to new technologies and programming languages.
Join Western Digital as a Senior Engineer in Reliability Engineering. Responsibilities include understanding system specifications, NAND flash storage analysis, cross-functional collaboration, product development feedback, quality assurance, and mentoring junior engineers. Requires a minimum of 5 years of experience in Reliability/Memory design/system engineering, a Bachelor's or Master's degree in Electrical/Electronics/Computer Science, and knowledge of memory design, semiconductor physics, computer architecture, and storage interfaces.
As a DevOps Automation Engineer, responsible for designing, implementing, and managing automated systems and processes to improve efficiency of development and operations teams. Work closely with software engineers, system administrators, and stakeholders to enhance CI/CD pipelines, manage infrastructure, and ensure smooth deployment and operation of applications.
Define system architecture for removable products including ASIC/SoC controller definition and NAND flash management. Work on products like portable SSDs, SD Express cards, and micro SD cards. Requires at least 5 years experience in embedded systems and 4 years in building firmware for Solid State Drives.
Design, develop, and integrate complex application components using Angular on the frontend and NodeJS, C#, Python, and SQL on the backend. Responsible for maintaining critical internal applications and improving them continually. Work collaboratively in Agile methodologies and participate in requirements analysis and design.
The Analyst 5, Enterprise Data will play a key role in designing, implementing, and maintaining Enterprise data warehouse & Data Pipelines that support Western Digital's Enterprise data & analytics strategy.
Requires solid analytics skill to address issues proactively. Develop dashboards for ecosystem health monitoring. Must have experience in Splunk administration, integrating IT tools, and Enterprise IT Infrastructure.
As a Manager of Software Development Engineering at Western Digital, you will lead a team focused on developing and operating business-critical development and CI/CD tools. Responsibilities include managing cross-functional teams, test development, software engineering practices, and collaborating with technical leaders. This role requires a focus on quality, progress monitoring, and team culture development.
Principal Network Engineer, Team Lead responsible for implementing, maintaining, and optimizing regional/local network infrastructure to ensure high performance and reliability. Provide technical leadership, troubleshoot network issues, collaborate with global IT teams, and lead IT projects. Required skills include 12+ years of experience in Network Routing, Switching, Wireless, and Network Security.