Expert ESD Design Engineer

Our vision is to transform how the world uses information to enrich life for all .
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Responsibilities will include, but are not limited to:
(1) ESD Architecture Leadership & Strategy
Define and own ESD architecture and protection strategy for high-speed I/O portfolios including:

• HBM (High Bandwidth Memory) / DDR / LPDDR PHY I/Os
• PCIe, USB, Ethernet, MIPI, and proprietary interfaces

Lead ESD-I/O co-design trade-off decisions, balancing:

• Aggressive ESD targets (HBM / CDM / MM)
• Ultra-low capacitance and leakage requirements
• Eye margin , jitter, bandwidth, return loss, and impedance matching

Drive architectural choices for:

• Snapback clamps, rail clamps, diode steering networks
• Triggered and advanced ESD devices (technology-dependent)
• Domain isolation and sequencing protection for complex SoCs

(2) Advanced Circuit Design, Modeling & Signoff
Perform and guide ESD circuit design and analysis at block and full-chip level.
Establish simulation methodologies for:

• Transient ESD stress (TLP-equivalent behavior)
• Dynamic clamp triggering and current handling
• I/O performance impact (cap loading, ringing, overshoot/undershoot)

Own ESD modeling correlation:

• Work with device/modeling teams on compact models (dynamic R, triggering, CV behavior)
• Drive correlation between SPICE simulations, TLP/VF-TLP, and silicon results

Act as the final technical authority for ESD design reviews and signoff.
(3) Silicon Debug, Reliability & Qualification Ownership
Lead silicon-level ESD failure analysis across products and generations.
Drive root cause analysis for:

• HBM/CDM failures
• Leakage and performance degradation
• Latch-up and substrate-coupling issues

Collaborate deeply with reliability

• Define corrective actions and preventive methodologies

Own ESD qualification strategies and ensure first-pass silicon success.
(4) Physical Design, Layout & Technology Engagement

• Define company-wide layout guidelines for ESD devices:
• Current uniformity, ballasting, guard rings
• Substrate/well engineering and isolation best practices
• Power clamp placement and return path integrity

Partner with technology, process, and PDK teams to:

• Influence ESD-friendly process features
• Enable scalable ESD solutions in advanced nodes

Ensure ESD robustness across multiple packages and IO ring configurations.
(5) Cross-Functional & Organizational Leadership
Serve as the ESD subject-matter expert (SME) across the organization.
Provide strategic guidance to:

• I/O and PHY design teams
• PDN, package, and board-level engineers
• Product engineering and manufacturing

Mentor and technically develop junior and senior ESD/design engineers.
Drive methodology reuse, IP standardization, and design best practices across programs.
About Micron Technology, Inc.
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities - from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
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