FPGA Silicon Design Verification Engineer

Performs functional logic verification of an FPGA to ensure design will meet specification requirements. Develops FPGA verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the FPGA design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with FPGA architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. May also collaborate with systems and software engineers to support integration testing of the FPGA. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Documents, reviews, and executes the verification strategy plan on different methodologies/techniques (e.g., gate-level-simulation strategy, power patterns/aware simulations) used to enable feature coverage as per the microarchitecture specifications.

You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor's Degree in Electrical Engineer, Computer Engineering, or related field.

Minimum of 7 years of experience in the following:

•        Experience with SystemVerilog.

•        Experience with UVM or OVM methodology.

•        Experience with scripting perl/Python

Preferred Qualifications:

• Master’s Degree in Electrical Engineer, Computer Engineering, or related field.

• Experience with code coverage.

• Experience with functional coverage.

• Experience with X-propagation.

• Experience with multiple RTL simulators.

• Experience with regression testing.

• Experience creating components that are reusable from block to top.

• Experience in Ethernet protocols.