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Semiconductor
The role involves working on the physical design and methodology for advanced processor chips, ensuring efficient design processes through analysis and optimization of workflows with EDA tools.
Top Skills:
Cadence GenusCalibreFormalityFusion CompilerIc CompilerInnovusLecPrimerailPrimetimeSynopsys Design CompilerTempusVoltus
Semiconductor
Develop physical design and methodologies for high-performance processor chips, collaborating with teams to ensure design convergence, integration, and scripting for automation.
Top Skills:
Cadence InnovusPerlPythonShellTclVerilog
Artificial Intelligence • Cloud • Information Technology • Software • Semiconductor
The role involves high-speed designs from RTL to GDSII, focusing on static timing analysis, power optimization, and post-silicon performance activities. Requires significant experience in P and R and collaboration across teams.
Top Skills:
CdnsP And R ToolsPerlPythonSnpsTclVerilogVhdl
Project Role : Physical Design Engineer
Project Role Description : Translate logical circuit designs into a physical layout, optimizing for area, power, and timing. Perform placement, routing, and clock tree synthesis, ensuring the design meets timing and manufacturing constraints. Work closely with timing and verification teams to resolve any physical design issues before tape-out.
Must have skills : Physical Design
Good to have skills : NA
Minimum 7.5 year(s) of experience is required
Educational Qualification : 15 years full time education
Summary: As a Physical Design Engineer, you will translate logical circuit designs into a physical layout, optimizing for area, power, and timing. Your typical day will involve performing placement, routing, and clock tree synthesis, ensuring that the design meets all timing and manufacturing constraints. You will collaborate closely with timing and verification teams to address and resolve any physical design issues prior to tape-out, ensuring a seamless transition from design to production. Roles & Responsibilities: - Experience in Block/SoC Physical Design in the following topics: PnR tools like ICC2/Innovus with regards to physical/timing convergence 10nm / 7nm / 5nm process nodes - Tapeout sign-off experience is a must using industry standard tools. - Cadence Encounter/Synopsys ICC2 tool set SDC, STA and Equivalence checking - Flow automation exposure will be an added advantage. - Working knowledge of Unix, Linux and SKILL, Shell/Python Script ability. - Quick learner with excellent interpersonal, verbal/written communications, problem solving and decision-making skills - Expected to be an SME. - Collaborate and manage the team to perform. - Responsible for team decisions. - Engage with multiple teams and contribute on key decisions. - Provide solutions to problems for their immediate team and across multiple teams. - Mentor junior team members to enhance their skills and knowledge in physical design. - Continuously evaluate and implement best practices in physical design to improve efficiency and quality. Professional & Technical Skills: - Must To Have Skills: Proficiency in Physical Design. - Strong understanding of placement and routing techniques. - Experience with clock tree synthesis and optimization. - Familiarity with timing analysis tools and methodologies. - Ability to troubleshoot and resolve physical design issues effectively. Additional Information: - The candidate should have minimum 7.5 years of experience in Physical Design. - This position is based at our Bengaluru office. - A 15 years full time education is required.15 years full time education
Project Role Description : Translate logical circuit designs into a physical layout, optimizing for area, power, and timing. Perform placement, routing, and clock tree synthesis, ensuring the design meets timing and manufacturing constraints. Work closely with timing and verification teams to resolve any physical design issues before tape-out.
Must have skills : Physical Design
Good to have skills : NA
Minimum 7.5 year(s) of experience is required
Educational Qualification : 15 years full time education
Summary: As a Physical Design Engineer, you will translate logical circuit designs into a physical layout, optimizing for area, power, and timing. Your typical day will involve performing placement, routing, and clock tree synthesis, ensuring that the design meets all timing and manufacturing constraints. You will collaborate closely with timing and verification teams to address and resolve any physical design issues prior to tape-out, ensuring a seamless transition from design to production. Roles & Responsibilities: - Experience in Block/SoC Physical Design in the following topics: PnR tools like ICC2/Innovus with regards to physical/timing convergence 10nm / 7nm / 5nm process nodes - Tapeout sign-off experience is a must using industry standard tools. - Cadence Encounter/Synopsys ICC2 tool set SDC, STA and Equivalence checking - Flow automation exposure will be an added advantage. - Working knowledge of Unix, Linux and SKILL, Shell/Python Script ability. - Quick learner with excellent interpersonal, verbal/written communications, problem solving and decision-making skills - Expected to be an SME. - Collaborate and manage the team to perform. - Responsible for team decisions. - Engage with multiple teams and contribute on key decisions. - Provide solutions to problems for their immediate team and across multiple teams. - Mentor junior team members to enhance their skills and knowledge in physical design. - Continuously evaluate and implement best practices in physical design to improve efficiency and quality. Professional & Technical Skills: - Must To Have Skills: Proficiency in Physical Design. - Strong understanding of placement and routing techniques. - Experience with clock tree synthesis and optimization. - Familiarity with timing analysis tools and methodologies. - Ability to troubleshoot and resolve physical design issues effectively. Additional Information: - The candidate should have minimum 7.5 years of experience in Physical Design. - This position is based at our Bengaluru office. - A 15 years full time education is required.15 years full time education
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