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Vrinda International

PRINCIPAL ANALOG MIXED SIGNAL ENGINEER

Posted One Month Ago
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In-Office or Remote
2 Locations
Expert/Leader
In-Office or Remote
2 Locations
Expert/Leader
Lead end-to-end analog and mixed-signal ASIC/SoC IP development, including architecture, circuit design, verification, sign-off, tape-out, silicon bring-up, characterization, yield improvement, and production support. Define technical strategy, lead design reviews, mentor engineering teams, collaborate with digital, physical design, verification, packaging, and test groups, and engage customers on technical requirements and solutions.
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 HIRING | PRINCIPAL ANALOG MIXED SIGNAL ENGINEER 


 Location: Trivandrum | Bangalore | Chennai
 Experience: 12–18 Years
 CTC: Up to ₹19 LPA
 Work Mode: Work From Office (WFO)
 ROLE OVERVIEW

We are looking for an experienced Principal Analog Mixed Signal Engineer to lead end-to-end ASIC/SoC Analog & Mixed-Signal IP development, from architecture and circuit design to tape-out, silicon bring-up, characterization and production support.

 KEY RESPONSIBILITIES


• Own AMS IP/subsystem development from concept to production
• Define architecture, roadmap and technical strategy
• Lead design reviews and mentor AMS teams
• Drive verification, sign-off, tape-out and silicon validation
• Support characterization, yield improvement and productization
• Collaborate with Digital, Physical Design, Verification, Packaging & Test teams
• Interface with customers on technical requirements and solutions? MUST-HAVE SKILLS
• PLL/DLL, ADC/DAC, Bandgap, LDO & Power Management
• Oscillators, Comparators, Charge Pumps & Sensor Interfaces
• Cadence Virtuoso, Spectre/APS, ADE XL/Explorer/Assembler
• HSPICE & AMS Verification
• Verilog-A / Verilog-AMS
• PVT, Monte Carlo, mismatch, noise & reliability analysis
• DRC, LVS, ERC, PEX & post-layout simulation
• Multiple successful silicon tape-outs
• Silicon bring-up & characterization experience
 PREFERRED SKILLS


• FinFET technology exposure
• SerDes experience
• MIPI experience
• USB experience
• PCIe experience
• DDR PHY experience
• ISO 26262 / IEC 61508 exposure
• Low-power analog design techniques
• Python / Perl / TCL scripting
• Productization & yield improvement experience

 Qualification: B.E./B.Tech/M.E./M.Tech in Electronics, Electrical, VLSI, Microelectronics or related field.




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