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Ixana

RTL Verification Engineer (On-site. Bengaluru, India)

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In-Office
Bengaluru, Bengaluru Urban, Karnataka, IND
Senior level
In-Office
Bengaluru, Bengaluru Urban, Karnataka, IND
Senior level
Plan and execute end-to-end RTL verification for SoCs and IPs using SystemVerilog and UVM. Build testbenches with functional coverage and assertions, perform gate-level and power-aware verification, debug waveforms, script automation, and collaborate with design, architecture, and system teams to deliver silicon.
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Build the next generation of ultra-efficient wireless systems by verifying cutting-edge SoCs for AI-powered wearables.

On‑site – Bengaluru, India

We provide comprehensive relocation support for engineers based outside Bengaluru.

About Ixana

Ixana is a Purdue University spinoff pioneering brain-inspired wearable computing. We've developed Wi-R, a patented communication tech that's 100x more energy-efficient than Bluetooth or Wi-Fi. Join our 60-person team building the next era of real-time, AI-powered human-computer interaction.

The Wi-R Revolution

Wi-R is our patented non-radiative near-field communication technology that creates secure "wire-like wireless" experiences through small E-field bubbles around your body. This breakthrough enables unprecedented energy efficiency at sub-0.1 nanojoules per bit, making long-term wearable and implantable devices finally practical.

See Wi-R in action: Visit ixana.ai for demos of high-speed data streaming through skin contact: https://vimeo.com/ixana/pairing-contact-transfer

What You’ll Do

  • Plan and execute RTL verification of SoCs and IPs from scratch to closure.

  • Develop and maintain UVM-based testbenches with functional coverage and assertions.

  • Debug gate-level simulations and analyze waveforms using industry-standard tools.

  • Write and manage verification environments using SystemVerilog, UVM, and scripting languages.

  • Collaborate with design, architecture, and system teams to deliver high-quality silicon.

  • Contribute to power-aware verification and verification methodology improvements.

What We're Looking For

  • 5–6 years of verification experience (or 4+ years with exceptional background/Masters/PhD).

  • Bachelor's in Engineering/Science with a GPA of 9+ from IITs, NITs, or Jadavpur University.

  • Strong expertise in SystemVerilog, UVM, assertions, coverage, and waveform debugging.

  • Proven ownership of end-to-end RTL verification for SoCs or multiple IPs.

  • Experience with gate-level simulation and power extraction tools.

  • Scripting skills (Python/Perl/Tcl) for automation.

  • Excellent communication and documentation ability.

Preferred Qualifications

  • Experience with DSP, processor design/verification, and AXI, MIPI, PCIe protocols.

  • Knowledge of wireless communication blocks and circuits.

Compensation & Benefits
• Base salary: Competitive and based on experience
• Cash bonus + meaningful early‑stage equity
• Relocation bonus, partner job‑search help
• Medical, dental, vision, generous PTO, inventor cash awards

Why Join Us

  • Work on deep tech that matters

  • Collaborate with world-class experts and industry leaders

  • Own your work end-to-end and see real impact

  • Enjoy a culture of speed, rigor, and respect

  • Competitive salary, equity, and global exposure

Ready to re‑wire the future of human-computer interaction?

Apply via our careers page. In your note, tell us how you envision using Wi‑R to transform everyday experiences across healthcare, industry, or consumer tech.

Ixana is an equal opportunity employer committed to advancing human-computer interfaces through innovative low-power electronics innovation.

Keywords: RTL Verification, SystemVerilog, UVM, SoC, Wireless Circuits, AXI, MIPI, Gate-Level Simulation, Startup, Digital Design, Coverage

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