Design and integrate complex SoCs using RTL, Verilog, and SystemVerilog. Develop multi-clock and asynchronous interfaces, apply ASIC development tools including lint and CDC, and support synthesis, timing analysis, ECO fixes, and formal verification. Implement and work with AMBA protocols including AXI, AHB, and APB, while contributing to clock and reset architecture. Collaborate effectively and communicate clearly across engineering teams.
company Overview
MosChip is a semiconductor and embedded system design company with a focus on Embedded, Turnkey ASICs, Mixed Signal IP, Semiconductor & Product Engineering and IoT solutions catering to Aerospace & Defense, Consumer Electronics, Automotive, Medical and Networking & Telecommunications.
Required Skills
- Experience in Logic design / RTL coding is a must.
- Experience is SoC design and integration for complex SoCs is a must.
- Experience in Verilog/System-Verilog is a must.
- Experience in Multi Clock designs, Asynchronous interface is a must.
- Experience in using the tools in ASIC development such as Lint and CDC.
- Experience in Synthesis / Understanding of timing concepts is a plus.
- Experience in ECO fixes and formal verification.
- Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture.
- Excellent oral and written communications skills.
- Proactive, creative, curious, motivated to learn and contribute with good collaboration skills
MosChip Bengaluru, Karnataka, IND Office
03rd Floor, Salarpuria Hallmark, Outer Ring Road, Kadubeesanahalli, Bangalore – 560103, Karnataka, India, Bengaluru, India, 560103
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