The Senior Verification Engineer will define verification architecture, implement methodologies, develop test plans, analyze simulation failures, and generate reports.
The Verification Engineer will define verification architecture, implement verification environment for block level, SoC subsystems and SOC top level design that use advance verification methodologies and meet established content, performance, quality, cost and schedule goals. He/She will also be responsible for the simulations of the SOC
Responsibilities
- Define overall verification strategies, methodologies, and simulation environment
- Work with RTL designers, system architects and block level verification engineers to develop top level verification requirements and test plans based on specifications.
- Develop, maintain and publish verification specifications.
- Analyze and debug simulation failures
- Generates code coverage and functional coverage report
- Run gate level simulation and debug them.
- Perform the constraint assertion-based verification
Qualifications and Skills
- BS in EE with 3+ years of experience or MS in EE with 1+ year experience
- Strong knowledge with ASIC Simulation Tool & Verification Language: all sign-off simulators, Verdi/Siloti
- Fluent in verification language such as UVM/OVM/System Verilog, Vera, Verilog
- Experience in writing Test-plans and creating directed and random test cases
- Strong scripting skills in Perl, Python, Linux shells etc.
Top Skills
Asic Simulation Tool
Linux Shells
Ovm
Perl
Python
System Verilog
Uvm
Vera
Verification Language
Verilog
Similar Jobs
Artificial Intelligence • Hardware • Information Technology • Machine Learning • Semiconductor
The Senior Engineer will guide verification efforts, develop test cases for memory architectures, and enhance verification flows for DRAM designs, engaging with international teams.
Top Skills:
FastspiceIeee1500JtagUvmVerilog
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Responsible for creating UVM based verification test benches for automotive chips, defining test plans, and ensuring robust design through collaboration.
Top Skills:
ApbAxiC++Cpu VerificationEthernetFormal VerificationInterconnect VerificationMemory Controller VerificationPcieUfsUvmXusb
Hardware • Semiconductor
The Senior Engineer I - Verification will work on processor subsystem verification, using skills in SV UVM and experience with JESD204C and PCIe protocols.
Top Skills:
Jesd204CPcieRisc-VSv Uvm
What you need to know about the Bengaluru Tech Scene
Dubbed the "Silicon Valley of India," Bengaluru has emerged as the nation's leading hub for information technology and a go-to destination for startups. Home to tech giants like ISRO, Infosys, Wipro and HAL, the city attracts and cultivates a rich pool of tech talent, supported by numerous educational and research institutions including the Indian Institute of Science, Bangalore Institute of Technology, and the International Institute of Information Technology.
