SoC Design Verification Engineer (Power Management)

Job Details:

Job Description: 

Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, micro-architects, full chip architects, RTL developers, post-silicon, and physical design teams to improve verification of complex architectural and micro-architectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from post-silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages and proliferates to future products.

Qualifications:

Minimum Qualifications:

• Candidate should have done Electrical or Computer Science Engineering or related field in Bachelor's with 8+ Years relevant experience or Master's with 6+ Years relevant experience or PhD with 4+ years relevant experience required.

• Related technical experience should be in/with: Silicon Design and/or Validation/Verification.

Preferred Qualifications:

• Design and/or Design Verification with developing, maintaining, and executing complex IPs and/or SOCs.

• OVM/UVM, System Verilog, constrained random verification methodologies.

• The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure).

• Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies.

• Experience in Xeon CPU Pre-Silicon or Post Silicon Validation.

• Create plans and tests for validating portions of a complex microarchitecture using written specs, RTL code, Firmware and other tests as a guide

• Experienced with the architecture, microarchitecture and Power Management flows and debugging failures to the root cause

• Develop and utilize various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design

• Participate in the debug of failures on silicon and develop new testing strategies to detect these failures on RTL models

• Engage with IP providers and customers to define, develop and deliver necessary infrastructure and address issues found during execution

• Develop tools and methods to streamline validation of PM flows, PM HW/FW interactions, and SOC level validation to deliver highest quality design in shortest time possible.

• Develop debug tools and validation software.

Job Type:Experienced Hire

Shift:Shift 1 (India)

Primary Location: India, Bangalore

Additional Locations:

Business group:The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.