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Analog Devices

Staff Design Verification Engineer

Reposted 3 Days Ago
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In-Office
Bangalore, Bengaluru Urban, Karnataka
Senior level
In-Office
Bangalore, Bengaluru Urban, Karnataka
Senior level
The Staff Design Verification Engineer is responsible for planning and verifying designs using SystemVerilog and UVM, creating verification plans, and mentoring junior engineers.
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About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

          

Job Responsibilities:

  • Planning and strategizing to effectively verify a design (block as well as full-chip).
  • Create verification plans (using vPlanner etc.) for blocks and full chip by developing a thorough understanding of the design under test.
  • Verification of blocks using SystemVerilog(SV) and UVM at module and at system including netlist simulation.
  • Employ UVM based verification methodology and use assertions, functional/code coverage, formal verification etc. to reach verification goals.
  • Drives decisions to develop or enhance verification methodologies.
  • May require working with emulation platforms.
  • Support post-silicon verification activities of the products working with design, product evaluation and applications engineering team
  • Expected to mentor, actively consult and/or lead junior engineers to achieve DV goals

Job Requirements:

  • B.Tech/M.Tech. in EE/ECE with 8–12 years of experience in digital SoC verification. 
  • Should be proficient in System Verilog, UVM, C, Perl, Python.
  • Knowledge of state-of-the-art verification techniques employing formal verification, testbench qualification, emulation for faster verification is required.
  • Experience with testplan development and development of verification environment from ground up is required. 
  • Knowledge of DSP and familiarity with verification of processor based SoC designs are very desirable.
  • A strong understanding of formal verification methodologies, tools, and their integration into the overall verification flow is preferred.
  • Strong inter-personal, teamwork and communication skills are required.
  • Expected to be highly independent, proactive and result oriented to achieve DV goals
  • Experience in technically mentoring, coaching junior engineers is very highly desirable.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days

Top Skills

C
Perl
Python
Systemverilog
Uvm

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