ASIC Principal Design Engineer

ASIC Principal Design Engineer

  

This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office.

Job Description:

   

Job Family Definition:

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication.

Management Level Definition:

Contributions have visible technical impact on a product or major subcomponent.  Applies in-depth professional knowledge and innovative ideas to solve complex problems. Visible contributions improve time-to-market, achieve cost reductions, or satisfy current and future unmet customer needs. Recognized internal authority on key technology area applying innovative principles and ideas. Provides technical leadership for significant project/program work. Leads or participates in cross-functional initiatives and contributes to mentorship and knowledge sharing across the organization.

What you'll do:

Responsibilities:

• Define and architect high-performance blocks for the latest, most advanced networking ASICs
• Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power
• Collaborate with the verification team in the development of the testplan and assist in debugging test failures
• Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes

What you need to bring:

Required Skills:

• Strong Verilog RTL coding skills
• Knowledge of Synopsys Design Compiler, Verplex LEC, and Spyglass is desirable
• Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus
• Knowledge of high performance memory subsystems
• Knowledge of multi-domain clock synchronization and high-speed serial interfaces
• Strong problem solving and ASIC debugging skills
• Excellent written and verbal communications skills
• MSEE or BSEE is required with 8 plus years of experience

Accountability, Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management (Inactive), Data Controls, Design, Design Thinking, Empathy, Follow-Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity (Inactive), Long Term Planning, Managing Ambiguity {+ 5 more}

Health & Wellbeing

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

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Job:

Engineering

Job Level:

TCP_04

    

    

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

   

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

   

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