Principal Solutions Engineer- AE

Posted 13 Days Ago
Be an Early Applicant
Bangalore, Bengaluru Urban, Karnataka
7+ Years Experience
Cloud • Hardware • Software • Semiconductor
The Role
Develop and implement comprehensive PDN analysis methodologies for complex 3DIC packages, analyze and optimize signal integrity for high-speed interfaces, collaborate with cross-functional teams to optimize PDN design and heat dissipation, propose innovative solutions for power integrity performance, and provide expert guidance on signal/power integrity matters.
Summary Generated by Built In

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

· Develop and implement comprehensive PDN analysis methodologies for complex 3DIC packages, including CPU, GPU, and TPU structures. 

· Perform detailed power noise and signal integrity simulations using tools like Cadence Sigrity PowerSI, Ansys HFSS, or equivalent. 

· Identify and resolve power integrity issues, such as IR drop, ground bounce, and signal noise, to achieve sign-off criteria. 

· Analyze and optimize signal integrity for high-speed interfaces in 3DIC packages, including HBM3, UCIE, and DDR5. 

· Perform advanced SI simulations using industry-standard tools like Cadence Clarity, HyperLynx, Ansys HFSS, or equivalent. 

· Extract parasitic from 3D package layout and integrate them into SI simulations. 

· Develop and implement design rules and guidelines for 3DIC package signal integrity. 

· Collaborate with design engineers, layout engineers, and thermal engineers to optimize the PDN design and ensure proper heat dissipation. 

· Stay up-to-date on emerging 3DIC technologies and trends and propose innovative solutions to improve power integrity performance. 

· Document analysis results and findings clearly and concisely for internal and external stakeholders. 

· Participate in technical discussions and provide expert guidance on signal/power integrity matters. 

· Master’s degree in electrical engineering, Computer Engineering, or a related field (PhD preferred) 

· 10+ years of experience in SIPI or related field, In-depth knowledge of PDN design principles, including modeling, simulation, and optimization techniques. 

· Expertise in advanced SI simulation tools like Cadence Sigrity, Clarity, HyperLynx, HFSS, or equivalent. 

· Proven experience in leading and managing complex engineering projects 

· In-depth knowledge of 3D-IC packaging technologies, including chip stacking, interposers, and through-silicon vias (TSVs) 

· Proven experience with high-speed interface design and analysis (HBM, DDR, PCIe, etc.). 

· Strong understanding of thermal, signal integrity, and power integrity concepts 

· Excellent written and verbal communication skills. 

· Ability to work effectively in a team environment. 

We’re doing work that matters. Help us solve what others can’t.

Top Skills

Ansys
C
C++
Cadence
Verilog
Vhdl
The Company
HQ: San Jose, CA
8,216 Employees
On-site Workplace
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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