Lead verification for SOC designs, develop test plans, debug simulations, innovate methodologies, and mentor the team to enhance verification efficiency.

The Physical Design Engineer will create and optimize chip design elements, handle layouts, and verify complex chip developments while troubleshooting design issues.

Conduct verification of IP and/or SoC microarchitecture using formal verification methodologies, create test and coverage plans, and collaborate with design teams. Develop and review formal proofs while maintaining verification infrastructure and improving methodologies.

The engineer will perform functional verification of SoCs, develop verification plans, and debug pre-silicon issues, ensuring compliance with architectural specifications.

Assist Treasury team with cash management, funding activities, settlement support, trade reconciliation, KYC compliance, process improvements, and data analysis.

The Mechanical Design Engineer will design and optimize thermal solutions for Intel graphics, ensuring products meet performance and schedule requirements through collaboration across engineering teams.

The IT SOx Compliance Specialist ensures compliance with security and privacy policies, manages risk assessments, and drives incident response activities.

The SoC Physical Design Engineer will implement physical design of custom IP and SoC designs, perform verification and signoff, and optimize performance while enhancing design methodologies.

This role involves developing, validating, and diagnosing low-level GPU drivers for Windows, enhancing driver quality through telemetry data analysis.

The DevOps Engineer designs and maintains CI/CD pipelines, tracks software performance, automates processes, and collaborates across teams to enhance development efficiency and security.

This internship focuses on system-level software development, including deep learning frameworks and distributed systems, requiring education in CS or EE.

Responsible for creating chip design elements including layouts, floor plans, and verification processes while troubleshooting complex design issues in physical design development.

The role involves developing and validating software for Intel's graphics solutions, focusing on pre-silicon validation and working with cross-functional teams.

The Principal GPU RTL Design Engineer develops logic for graphics IPs, defines architecture features, optimizes designs, and mentors technical leaders while ensuring design verification.

The candidate leads Analog Integration for chiplet designs, drives analog integration aspects, collaborates with teams, creates simulations, and supports post-silicon activities.

Develops logic designs and RTL coding for IP generation, optimizing performance and quality. Collaborates with teams and conducts design reviews.

The Survey Administrator will manage survey setups, dashboards, data collection integrity, and troubleshooting Qualtrics-related issues. Ideal for entry-level candidates aiming to develop expertise in survey administration.

Responsible for verifying SoC designs by developing test plans, running simulations, analyzing performance, and debugging issues in the presilicon environment.

HPC Solution Architect responsible for technical leadership on HPC projects, guiding customers in Intel technologies, conducting workshops, and optimizing HPC architectures with collaboration across teams.

The Digital Circuit Design Engineer will design custom circuits, finalize memory architecture, manage simulation tools, and collaborate on innovative design implementations focusing on quality, power, and area reduction.