Search the 21 jobs at Marvell Technology

Work as a Senior Staff Design Verification Engineer at Marvell, responsible for verifying circuitry in chips for high-speed data transfers. Requires 8+ years of experience in chip design verification, expertise in System Verilog, UVM, and DDR technologies. Strong communication and collaboration skills are essential.

Develop and execute EHS strategies, ensure regulatory compliance, support sustainability initiatives, provide EHS training, manage relationships with regulatory bodies, monitor EHS performance, and manage resources. Based in Bangalore, India.

Design and implement SoC execution and management platform, optimize drivers and applications for high performance, collaborate with hardware and software teams, interact with customers, and write documentation.

Join Marvell's ASIC design physical implementation team in Bangalore, working on multi-million hierarchical designs using industry-standard tools. Provide guidance to junior engineers, collaborate with global teams, and handle day-to-day technical deliverables.

Senior Staff Engineer - Physical Design position at Marvell in Bangalore. Responsible for ASIC design physical implementation, handling hierarchical designs using industry-standard tools, working with global teams, and providing guidance to junior engineers.

Lead DFT full chip activities, develop new DFT features, optimize test time, troubleshoot issues, support junior team members, and collaborate with global teams. Requires 7-10 years of experience and proficiency in various DFT tools and techniques.

Implement complex analog circuits for automotive high-speed SerDes and other IPs. Collaborate with cross-functional teams, drive design reviews, provide mentorship, and ensure adherence to design practices. Bachelor's/Master's/PhD in Electrical Engineering with 6+ years of analog IC design experience required.

Senior Staff Engineer at Marvell focusing on Windows application development using C# and .NET technologies, Python based tools and automation framework, and working with hardware and firmware teams to validate storage IPs.

Senior Staff Software Field Applications Engineer at Marvell, responsible for providing technical support to customers integrating Marvell products, troubleshooting and resolving issues, and collaborating with interdisciplinary teams to meet customer needs.

Join Marvell as a Principal Physical Design Engineer in Hyderabad, India. Work on physical design and methodology for next-generation high-performance processor chips. Collaborate with global teams, maintain and enhance Place and Route Flow, and drive successful tape-outs. Must have a Bachelor's or Master's degree in relevant fields and 12+ years of experience in physical design.

As a Digital IC Design Senior Staff Engineer with Marvell, responsible for conducting circuit analysis, mentoring others, designing and delivering I/O libraries, providing technical guidance to SOCs, and developing best practices for circuit design.

Lead for the Compiler team responsible for defining, designing, developing, and testing features in GCC, LLVM, and P4 compilers. Works with internal teams and Open-Source Community developers. Provides direct customer support, technical guidance, and implements proof of concept solutions. Requires expertise in ARM and RISCV architectures, GCC, LLVM, P4 compiler, GLIBC, and assembler/loader tools.

Collaborate with stakeholders to design, implement, and maintain data pipelines and models using cloud platforms. Ensure data quality, security, and compliance while supporting analytics initiatives. Mentor junior team members in best practices for data architecture and engineering.

The Switching technical writer at Marvell's Switching Customer Solution Group is responsible for documenting software drivers, tracking software updates, and ensuring the accuracy and quality of technical documents. The role involves working closely with support engineers, ASIC designers, and software engineers. Marvell offers a hybrid work environment with a mix of in-office and remote work days.

Take responsibility for projects, performing end-to-end SI/PI analysis on high-speed traces and critical power domains to ensure performance meets specifications. Own all steps in supporting SI/PI including modeling, simulation, measurement, and customer support. Collaborate with packaging and board layout teams to define specifications and provide feedback for improvements.

Develop and maintain verification environment using Verilog, System Verilog, and UVM. Define and review verification test plans, verify design with functional parameters, maintain regression tests, analyze verification coverage, and drive verification to reach targets.

Lead the design verification of complex CPU sub-systems, mentor and guide a team of design verification engineers, own the sub-system verification flows, methodologies, and verification of IP/Sub-system.

Join Marvell as a Senior Staff RTL Design Engineer working on ultra-dense and performance Static Random Access Memory (SRAM) memory compilers.

Define sub system architecture, micro-architecture, and register specification for highly complex SoCs. Drive specification writeup, conduct reviews, implement RTL coding, work with third-party vendors, collaborate with teams, provide mentorship. Requires Bachelor's or Master's degree in Computer Science or Electrical Engineering with 12-18 years of experience.

Join Marvell as a Digital IC Design Staff Engineer responsible for shaping the micro-architecture of IP blocks, writing specifications, RTL coding, collaborating with design and verification teams, post-silicon validation, and mentoring junior engineers. Requires 5-10 years of experience in ASIC Design with a Bachelor's or Master's in Electrical Engineering or related field.