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Technologist, ASIC Development Engineering role focusing on Pre-Silicon Platforms Bring up Lead. Responsibilities include debugging and bringing up Pre-Silicon Platforms like Cadence Palladium/Protium Emulators and HAPS FPGA Prototyping. Required to work on complete chip prototyping and emulation, unit level bring up, and collaborate with various teams for validation and support.

Principal Engineer in ASIC Development Engineering at Western Digital responsible for creating design documents, defining test flows, collaborating with R&D teams, driving product migration, monitoring product yield, providing technical solutions, and leading components.