Top Design Engineer Jobs in Bengaluru

Design and lead development of miniaturized PCBs for wearable devices using custom Wi-R ICs and COTS components. Create schematics and layouts, perform board-level testing and debugging, collaborate on packaging, and support prototype validation and test automation.

Design and develop mechanical components and enclosures using CAD. Create 3D models, assemblies, and manufacturing drawings. Support prototyping, vendor coordination, tolerance analysis, material selection, manufacturability, field testing, and documentation while collaborating with electronics and hardware teams.

Lead microarchitecture and RTL design of high-performance SoC subsystems for AI/cloud connectivity. Drive RTL development in Verilog/SystemVerilog, optimize PPA and testability, collaborate cross-functionally for timing closure, silicon bring-up, and post-silicon debug, and mentor engineering teams while advancing IP reuse and design methodologies.

Lead RTL design and implementation of complex digital IPs and SoC subsystems for high-performance connectivity products. Own specification-to-silicon flow, design synthesizable Verilog/SystemVerilog, develop datapaths, control logic and protocol engines (CXL, PCIe, Ethernet, AXI). Collaborate with verification, physical design, firmware, and system teams; support synthesis/lint/STA/DFT, debug silicon issues, and mentor engineers.

Create and maintain detailed 3D models and 2D drawings for mechanical components and assemblies, apply DFM principles, manage complex assemblies and BOMs, ensure compliance with standards/GD&T, collaborate with engineering and manufacturing, manage CAD data in PDM, and support design reviews.

The role involves digital RTL design of SoCs, contributing to architecture and driving methodologies for successful chip designs, while collaborating with various teams.

The Hardware Design Engineer will design, develop, and test electronics circuits and systems, collaborating with teams for enhanced product performance.

Design, analyze, and tape-out low-power mixed-signal and RF circuits for wearable communication chips. Integrate analog IP into SoCs, verify and validate designs, collaborate with firmware/board/testing teams, and perform lab validation from schematic through layout and tape-out.

Lead RTL-to-GDSII implementation on advanced-node digital designs, driving PPA and quality-of-results. Own flows, debug complex issues, collaborate with CAD/design/program teams, mentor juniors, adopt new tools and ML techniques, and engage EDA vendors to resolve root causes.

Design and implement synthesizable RTL for high-speed interconnect ASICs, drive synthesis/timing closure, develop bare-metal firmware for embedded RISC CPU IP, lead pre-silicon simulation, emulation, and silicon bring-up, and collaborate across verification, physical-design, analog, and DSP teams to debug and integrate hardware-software systems.

Design and own end-to-end RF systems for radar/defence: architecture, waveform and receive-chain design, RF front-ends, antennas and arrays, calibration, lab/field validation, and production hardening. Use EM and circuit simulation tools, RF lab instruments, and scripting to iterate designs and run target-tracking field tests.

Lead RTL Design Engineer for wireless baseband architecture, overseeing design teams, implementing RTL designs, and ensuring adherence to methodologies.

Join a startup as a Physical Design Engineer, focusing on RTL-to-GDSII implementation, performance optimization, and AI-driven automation.

Design and take digital, analog, and mixed-signal PCBs from architecture through layout, fabrication, bring-up, testing, and production. Address signal/power integrity, grounding, thermal, and EMI/EMC. Define hardware-firmware interfaces, debug and characterize boards, develop test fixtures, and manage BOMs, documentation, and vendor assembly.

Design and optimize custom digital logic for UAVs focusing on motion control, neural network acceleration, and real-time computation. Responsibilities include RTL architecture design, collaboration with engineers, integration of custom RTL blocks, and optimization for performance and reliability.

The ASIC Design Engineer will develop SoCs, micro-architecture design, RTL coding, optimization, and collaborate with multiple teams for ASIC development.

Lead mechanical design from concept to production for AMR/AGV systems: create 3D models and drawings, perform tolerance analysis, DFMEA, prototyping, testing, validation, manufacturability optimization, and cross-functional collaboration to support product launches and continuous improvement.

The role involves leading a team of Physical Design engineers in delivering high-performance silicon products while ensuring adherence to timing, power, and area requirements. Responsibilities include technical leadership, hands-on ownership of critical blocks, automation development, and stakeholder management to meet project milestones.

Design, develop and integrate building management and controls for modular datacenter MEP systems. Own control architecture, PLC/HMI/SCADA programming, protocols, vendor review, FAT/SAT commissioning, troubleshooting, and mentor junior controls engineers while aligning with cybersecurity and IT requirements.

Perform IC physical design from netlist to GDS: floorplan, implementation, timing closure, STA, ECOs, verification (FV/CLP/PV). Handle medium/complex blocks (~400K–800K instances), debug congestion, high-utilization and multi-voltage designs. Use EDA tools (ICC/ICC2, Synopsys STARXT/PTSI, Olympus/Calibre, Rehawk). Perl/Tcl scripting, IR-drop analysis and low-power design are desirable.

Perform full-chip functional verification including RTL-to-RTL and RTL-to-netlist FV, execute Conformal ECO flows, and debug non-equivalence issues for Qualcomm chip designs. Collaborate on verification tasks onsite in Bangalore.

Design and develop mechanical systems for aerospace applications, focusing on ruggedness and lightweight mechanisms, while collaborating with diverse teams.

The Lead RF Hardware Design Engineer will lead the design and development of RF hardware for satellite communication systems, guiding a team through complex design challenges.

The Junior Mechanical Design Engineer will support the design and development of mechanical subsystems, create 3D CAD models, contribute to structural analysis, and assist in prototyping and testing.

The Microarchitect and RTL Design Engineer will design microarchitectures, ensure optimal performance in RTL coding, and collaborate with software and verification teams to meet project requirements.