Top Design Engineer Jobs in Bengaluru

Seeking a Principal Physical Design Engineer with extensive experience in SoC/product development, physical design tools, and ownership from architecture to GDSII.

The Microarchitect and RTL Design Engineer will design microarchitectures, ensure optimal performance in RTL coding, and collaborate with software and verification teams to meet project requirements.

Seeking a Physical Design Engineer to manage RTL to GDS flows, collaborate on performance trade-offs, and develop physical design methodologies.

Lead the physical design of complex SoC/silicon products, ensuring design closure and verification. Collaborate with teams and manage multiple tasks effectively.

The Physical Design Engineer will develop complex SoC products, ensuring timing closure, physical verification, and driving designs from architecture to GDSII, utilizing advanced tools and methodologies.

Hands-on RF/mixed-signal engineer to design, implement, bring-up and test wireless communication hardware (PCB-level IC integration). Work with high-speed RF DACs/ADCs, ADS/HFSS, JESD204B; phased array, Ku-band and mmWave experience desirable.

Design, simulate, and validate antenna systems for space and terrestrial applications using HFSS/CST. Perform FEM/FDTD simulations, impedance matching, prototyping with PCB teams, and hands-on VNA/anechoic chamber testing.

Design and implement high-performance digital solutions, collaborating with teams on IP integration and overseeing designs at advanced nodes. Ensure timing closure and debug pre- and post-silicon.

Design high-performance analog-to-digital and digital-to-analog converters, evaluate silicon, and oversee layout in advanced CMOS processes.

Design and verify digital datapaths for high-performance ADCs and DACs using RTL, assist with synthesis and timing closure, and automation through scripting.

The Senior Analog IC Design Engineer will work on high-speed analog designs, collaborate with teams for implementation, and analyze performance tradeoffs.

Design and verify high-performance digital and mixed-signal ICs, focusing on RTL design, behavioral modeling, and digital control circuits.

The Senior Digital Design Engineer will design, verify, and validate digital architecture for automotive and space applications, focusing on RTL and FPGA.

Technical lead responsible for hands-on ownership of critical sub-chip blocks, driving timing and PPA convergence, developing automation (Tcl/Python), ensuring sign-off (STA, EM/IR, PV), and mentoring a small PD team to meet tape-out milestones.

Lead digital design and RTL implementation for high-performance controller and bridge designs. Own block- and full-chip development (≤16nm) from architecture through GDS, ensure timing closure, lead IP integration, verify using UVM and Synopsys/Cadence flows, and manage pre- and post-silicon bring-up and debugging alongside cross-functional teams.

Lead RTL and micro-architecture development for high-performance controller and bridge designs at advanced nodes (≤16nm). Drive IP integration, timing closure, verification (UVM), and pre-/post-silicon bring-up and debug, collaborating across cross-functional teams from architecture to GDS.

Lead block-level physical implementation from synthesis and floorplan through CTS, routing, and sign-off. Optimize PPA via deep timing, power, and congestion analysis, automate flows with Tcl/Python, resolve DRC/LVS/IR/timing issues, and collaborate with RTL/DFT teams to left-shift constraints and ensure clean GDSII tape-outs.

Lead full RTL-to-GDSII physical design for sub-5nm SoCs: own full flow, optimize PPA, build scalable push-button methodology, remove execution bottlenecks, and collaborate with RTL/Architecture/DFT/foundry/EDA teams.

Lead SoC physical design including P&R, floorplanning, clocking, timing and power closure. Develop methodologies, run signoff flows (timing, power, EM/IR, PDV), collaborate with micro-architects for PPA tradeoffs, and drive tape-out readiness for deep-submicron (7nm or below) designs.

Design and develop mechanical systems for enclosure structures and payload integration; perform FEA and simulations; produce CAD models, assemblies, and specifications; oversee fabrication, assembly, and testing; conduct design reviews and ensure compliance with space environmental standards.

Design and implement RTL blocks for wireless systems, perform synthesis on FPGAs, and collaborate with software and hardware teams.

Lead RTL Design Engineer for wireless baseband architecture, overseeing design teams, implementing RTL designs, and ensuring adherence to methodologies.

The Hardware Design Engineer will design, develop, and test electronics circuits and systems, collaborating with teams for enhanced product performance.

Design and develop control electronics for high power systems, leading all stages from specification to manufacturing while ensuring compliance with automotive safety standards.

Design high-performance analog-to-digital and digital-to-analog converters, including circuits from specification to market introduction, while evaluating silicon and utilizing lab equipment.