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As a Principal Design Engineer, you'll work with IC design teams on quality management, improvements, and analysis, ensuring high standards in semiconductor products.

The role involves enhancing existing verification environments, developing new methodologies, and collaborating with various design teams. Requires strong functional verification skills and prior digital verification experience.

As Lead Application Engineer, you'll provide technical consultation on digital & sign-off products, resolve complex issues, and guide customers with design methodologies. You'll also mentor a small team and contribute to product improvements based on customer feedback.

The Principal Design Engineer will support DDR IP subsystems integration, resolve complex issues, perform simulations, assist customers, and enhance their experience.

Develop verification strategies and test plans for SOC verification, utilizing System Verilog and UVM. Create tests and manage environments for functionality and performance validation.

The Principal Design Engineer will focus on design verification for IP development, utilizing UVM for testbench creation and formal verification while coordinating with teams to ensure high-quality outputs.

The role involves design verification for IP development, including UVM testbench creation, formal verification, and design strategy formulation.