Top Tech Jobs & Startup Jobs in Bengaluru, KA

Lead Design Engineer responsible for creating and maintaining functional verification environments, defining verification strategies, and collaborating with cross-functional teams. Requires expertise in Verilog, SystemVerilog, UVM methodology, RTL, and various verification domain skills. Desirable skills include power-aware RTL, formal verification, gate-level simulations, and exposure to automotive IP verification.

The Sr. Principal Software Engineer at Cadence will be responsible for UI/UX development in React.js, optimization of website performance, integration with backend services, creating data visualizations, and backend infrastructure development.

Join a growing team at Cadence as a Sr Principal Design Engineer, responsible for leading the Design for Test activities for next-gen SoCs. Define DFT architecture, implement verification logic, collaborate with teams, and work on silicon bring up. Ideal candidate has 8-15+ years of experience with key DFT concepts and working knowledge of Verilog coding

Looking for a Senior Principal RTL Design Engineer with 12+ years of ASIC design experience. Proficiency in Verilog coding, RTL design, and various interface protocols. Must have knowledge of RTL checks and synthesis flow.

Maintain/upgrade infrastructure/automation for RTL development and design-verification teams at multiple locations using multiple server farms. Manage/monitor regression trends, automate error/defect reporting, and support users in various server farms.

Perform formal verification of design for complex IPs, subsystems, and SoCs using Jasper App. Define and improve design and verification methodologies for formal verification closure. Partner with customers to build innovative formal solutions and drive new capabilities/features with R&D team.

Cadence is looking for a passionate Layout Design professional with 2-14 years of experience in Analog Layout and SerDes IP. The role involves working on cutting edge FinFET technologies and collaborating with Tier-1 customers. Responsibilities include hands-on layout experience in various analog IPs, knowledge of layout effects on circuits, understanding of DSM technology, and communication skills. Scripting and automation experience is a plus.