Top Tech Jobs & Startup Jobs in Bengaluru, KA
As a Digital IC Design Senior Staff Engineer with Marvell, responsible for conducting circuit analysis, mentoring others, designing and delivering I/O libraries, providing technical guidance to SOCs, and developing best practices for circuit design.
Lead for the Compiler team responsible for defining, designing, developing, and testing features in GCC, LLVM, and P4 compilers. Works with internal teams and Open-Source Community developers. Provides direct customer support, technical guidance, and implements proof of concept solutions. Requires expertise in ARM and RISCV architectures, GCC, LLVM, P4 compiler, GLIBC, and assembler/loader tools.
Collaborate with stakeholders to design, implement, and maintain data pipelines and models using cloud platforms. Ensure data quality, security, and compliance while supporting analytics initiatives. Mentor junior team members in best practices for data architecture and engineering.
The Switching technical writer at Marvell's Switching Customer Solution Group is responsible for documenting software drivers, tracking software updates, and ensuring the accuracy and quality of technical documents. The role involves working closely with support engineers, ASIC designers, and software engineers. Marvell offers a hybrid work environment with a mix of in-office and remote work days.
Take responsibility for projects, performing end-to-end SI/PI analysis on high-speed traces and critical power domains to ensure performance meets specifications. Own all steps in supporting SI/PI including modeling, simulation, measurement, and customer support. Collaborate with packaging and board layout teams to define specifications and provide feedback for improvements.
Develop and maintain verification environment using Verilog, System Verilog, and UVM. Define and review verification test plans, verify design with functional parameters, maintain regression tests, analyze verification coverage, and drive verification to reach targets.
Lead the design verification of complex CPU sub-systems, mentor and guide a team of design verification engineers, own the sub-system verification flows, methodologies, and verification of IP/Sub-system.
Join Marvell as a Senior Staff RTL Design Engineer working on ultra-dense and performance Static Random Access Memory (SRAM) memory compilers.
Define sub system architecture, micro-architecture, and register specification for highly complex SoCs. Drive specification writeup, conduct reviews, implement RTL coding, work with third-party vendors, collaborate with teams, provide mentorship. Requires Bachelor's or Master's degree in Computer Science or Electrical Engineering with 12-18 years of experience.
Join Marvell as a Digital IC Design Staff Engineer responsible for shaping the micro-architecture of IP blocks, writing specifications, RTL coding, collaborating with design and verification teams, post-silicon validation, and mentoring junior engineers. Requires 5-10 years of experience in ASIC Design with a Bachelor's or Master's in Electrical Engineering or related field.
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