Top Design Engineer Jobs in Bengaluru, KA
Structural Design Engineer (Precast) position at ONX Homes in Bangalore. Responsibilities include understanding Precast structural design requirements, preparing design calculations, checking design drawings, and ensuring structural feasibility. Requires knowledge of precast connections and software like Etabs and Safe.
Responsible for designing and releasing valves and associated Bill of material. Perform self-checking to ensure high-quality deliverables and provide guidance to staff. Must have 5-8 years of Valve industry design experience.
Seeking a skilled Senior SRAM Circuit Design Engineer to work on embedded SRAM design, SRAM compiler development, and advanced development tasks. Responsibilities include guiding SOC design, silicon test, and productization efforts. Ideal candidate has 5+ years of SRAM design experience and expertise in Python scripting.
Lead all block/chip level PD activities including floor plans, abstract view generation, RC extraction, PNR, STA, EM, IR DROP, DRCs & schematic to layout verification. Collaborate with design team to address challenges, troubleshoot design issues, and enhance RTL2GDS flow for better PPA.
Seeking a Senior SoC Design Engineer to design next-generation SoCs, drive SoC execution, collaborate with multi-functional teams, participate in silicon architecture reviews, mentor engineers, and propose solutions for process inefficiencies.
Seeking a Senior CPU Design Engineer to work on the design and implementation of a complex design unit for CPUs. Responsibilities include design and implementation of modules, making architectural trade-offs, micro-architecture design, and supporting silicon validation. Requires 2+ years of ASIC development experience and a BS or MS in electrical engineering or computer engineering.
Design and implement hardware for SoCs and GPUs, work on micro-architecture and RTL development, collaborate with various teams for design verification, and contribute to post-silicon verification and debug processes.
Join NVIDIA as a Circuit Design Engineer in the Global Circuits Team to design and deliver circuit IPs involving SRAM arrays, Analog and/or Digital circuits. Architect innovative circuit solutions, participate in design and verification of Custom Circuit IPs, and mentor junior team members. Must have 3+ years of relevant experience in memory design and circuit design, proficiency in Perl/Python scripting, and a BE/M-Tech in Electrical & Electronics or equivalent experience.
Develop and enhance timing analysis/signoff workflow, chip integration and floor planning, custom timing script development, design optimization, and PD workflow development in ASIC design.
Design and implement clocking modules and topologies for Tegra SOCs, collaborate with SOC functions, work on automation and methodology for Clocking RTL, involved in end-to-end SOC execution, exposure to various methodologies and designs.
Partner with system architects to define micro-architecture, develop RTL, and ensure accurate verification. Own silicon bring-up, mentor junior engineers, and collaborate with cross-functional teams. Requires BS/MS with 2+ years of digital design experience, proficiency in Verilog/System Verilog, and knowledge of industry specifications.
Seeking a Senior Enclosure Mechanical Design Engineer responsible for structural design of enclosures, FEA analysis, and validation. Key responsibilities include performing structural analysis, compliance testing, design optimization, and collaborating with cross-functional teams.
The Enclosure Mechanical Design Engineer will be responsible for designing and developing energy storage products from a mechanical perspective, focusing on enclosure and cabinet structures. Key responsibilities include CAD modeling, engineering drawings, product development, and collaborating with cross-functional teams for successful project deployments.
At Intel Labs Bangalore, seeking an EDA tools software engineer to develop design environment/infrastructure, support design projects, and collaborate on CAD tools to accelerate design prototyping. Requires expertise in CAD, chip design, scripting, EDA tools, and digital circuit design. Preferred knowledge of Intel processes and tools like Virtuoso. Bachelor's or Master's degree in relevant field with industry experience.
The Senior Analyst - Identity Access Design Engineer at CommBank is responsible for defining how access should be structured, requested, presented, and managed across strategic Identity platforms. They work on role management lifecycle, policy maintenance, and driving insights from data sets to enhance access management. The role requires strong data skills, knowledge of Identity and Access Management concepts, and experience in AI/ GenAI.
Join Axiado as an ASIC Design Engineer to work on Smart Edge SoCs for network/systems control, management security systems, and IIoT. Responsibilities include micro-architecture design, RTL coding, synthesis, timing closure, and optimization. Collaborate with various teams throughout the ASIC development process. Must have 8+ years of experience in RTL logic design, synthesis, and verification.
Senior Structural Design Engineer position at ONX Homes in Bangalore. Responsible for understanding precast structural design requirements, preparing design calculations, checking design drawings, and ensuring structural feasibility in the model.
Join Marvell as a Digital IC Design Staff Engineer responsible for shaping the micro-architecture of IP blocks, writing specifications, RTL coding, collaborating with design and verification teams, post-silicon validation, and mentoring junior engineers. Requires 5-10 years of experience in ASIC Design with a Bachelor's or Master's in Electrical Engineering or related field.
Senior Principal Signaling Design Engineer responsible for managing, supporting, guiding, and mentoring signaling team. Designing signaling interlocking systems for railway projects. Collaborating with colleagues in a world-class engineering design center.
Seeking an experienced UI Lead to guide a team of designers and developers in creating visually appealing and user-friendly interfaces across digital platforms. Responsibilities include developing UI/UX design strategy, collaborating with stakeholders, creating prototypes, conducting testing, and leading and managing the UI team.
Seeking a Physical Design Lead with expertise in full-chip RDL and bump layouts for semiconductor products. Responsibilities include design optimization, team management, collaboration with packaging and manufacturing engineers, and integration with chip package. Ensure robust design solutions and compliance with project specifications.
Seeking a Digital Architect (UI/UX) to lead the design of user experience for the Signify IT Landscape, focusing on business processes, data architecture, and solution architecture. Responsible for defining UX strategy, application standardization, technology modernization, and simplicity in solutions. Requires 10 years of experience in technology and UX certifications, with expertise in User Experience Design and UI 5 / SAP Fiori.
Condé Nast is looking for a Design System Lead Engineer to play a critical role in steering the Verso Design System. This position will involve collaborating with international colleagues, engaging with stakeholders, and working closely with various functional pillars to build innovative, user-centric products. The ideal candidate will contribute to shaping the future of digital experiences through creativity, collaboration, and a commitment to design excellence.
Create design methodology solutions for RF Technology nodes, develop design collateral, work with EDA vendors, write scripts, apply machine learning techniques, and collaborate on projects.
Microchip is seeking an experienced, self-driven IC layout designer with proven skills in physical layout of sensitive analog circuits. This position will require floor planning, detailed sensitive signal routing, and sensitive logic layout techniques. Support and collaboration with Analog Designers, peers, and global teams is essential to successfully complete circuit layouts and meet schedules.
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