Top Design Engineer Jobs in Bengaluru

As a Lead Engineer in Application Software Design, you will design, develop, and implement digital applications for the food and beverage sector. The role involves leading architectural design, collaborating with cross-functional teams, resolving technical issues, and mentoring junior developers, ensuring high code quality and optimal performance.

As a Senior Staff Design Verification Engineer, you will lead verification efforts for blocks, sub-systems, and environments. Your role involves developing and maintaining verification environments using UVM, creating test plans, debugging test failures, and ensuring designs meet specifications for telecom and automotive sectors.

Develop analog and interface IPs for ASIC projects, ensuring successful delivery and integration with various customers. The role involves hands-on circuit design experience, particularly in advanced finfet nodes. It requires expertise in analog and mixed signal design, strong communication skills, and a thorough understanding of the full ASIC development lifecycle.

The Staff Engineer I - Analog Design at Alphawave Semi will be responsible for analog circuit design involving sub-blocks like DLL, PLL, and high-speed IO. The role includes defining architecture, simulation, mentoring junior designers, and validating designs. High-speed circuit delivery for leading SoC designs is crucial.

The Senior Staff Engineer I - RTL Design will deliver standards-compliant IP blocks for UCIe, PCIe, CXL, and HBM. Responsibilities include leading ASIC/FPGA projects, performing RTL coding in Verilog, refining development processes, and mentoring junior engineers. The role entails collaboration with verification and back-end teams, tracking bug reports, and ensuring quality designs while managing complex design simulations.

The Physical Design Engineer will optimize and implement RISC-V CPU IP from RTL to GDSII, achieving PPA goals while collaborating with RTL and microarchitecture teams. This role focuses on high-quality design and fast-paced development of hardware IP.

The Sr Staff Engineer, Physical Design is responsible for leading the implementation and optimization of high-performance RISC-V CPUs from RTL to GDSII. This includes achieving performance, power, and area goals, collaborating with microarchitecture and RTL teams, and contributing to physical implementation flow development.

The Lead Product Engineer is responsible for RTL coding using Verilog/VHDL/System Verilog, designing cores and ASICs, and ensuring proper synthesis and verification processes are followed. They will utilize scripting languages and be involved in low power and formal verification aspects of design.